Talk:Launch Vehicle Digital Computer

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Has anyone ever thought to ask if the software could be read from the units on display? 128.194.22.23 18:01, 19 February 2007 (UTC)[reply]

I know someone has tried to get hold of the software without any luck so far. I don't know whether they've tried to get access to the displayed Saturn IUs, or whether reading the core memories would even be feasible without specialised hardware. Mark Grant 00:32, 20 February 2007 (UTC)[reply]

"with a 2.048 MHz clock cycle, add operations taking 82 microseconds" So "add operations" took 168 clock cycles? Is the LVDC is a kind of serial computer? --68.0.124.33 (talk) 06:09, 4 March 2008 (UTC)[reply]

I believe so, yes: the documentation says "the Add/Subtract circuit serially adds or subtracts the contents of the accumulator, the contents of the addressed memory location and any carry that develops from the previous bit summation." Would be worth adding some more info about how the internals worked but it's not particularly clear :). Mark Grant (talk) 02:04, 4 June 2009 (UTC)[reply]

I have some LVDC Core Memory Blocks and Page Card Assemblies within my private collection that are photo documented with a description of the LVDC on my personal website. The direct URL is http://www.spaceaholic.com/lunar_module_saturn_v.htm . Please feel free to reference the material on my site if you think it will enhance this article on the LVDC. Spaceaholic (talk) 21:45, 16 October 2008 (UTC)[reply]

NASA links dead in 2013

Existing links to NASA reports are dead, and I wasn't able to find them on the NTRS. From http://www.sti.nasa.gov/find-sti/ [30 Nov 2013]: "On March 20, 2013, the NASA Administrator directed that the NASA Technical Reports Server (NTRS) be taken off-line while the Agency conducted a review of whether there is a risk of export-controlled documents being made available on the NTRS website.". For more info regading where this comes from go to [[1]]. Not sure why they bothered since the military of just about every capable nation on earth likely scraped the entire NTRS years ago. Here's one interesting report I was able to track down: Saturn V Apollo Launch Operations Plan [[2]] 203.129.23.146 (talk) 23:14, 29 November 2013 (UTC)[reply]

Dates

Some key dates would be welcomed.

Work on computer started around 1963 [3], or even 1962 [4]. --89.25.210.104 (talk) 20:57, 5 April 2018 (UTC)[reply]

Originally known as the Saturn Triple Modular Redundancy computer (TMR) [5] - Rod57 (talk) 14:43, 1 November 2018 (UTC)[reply]

Questions - could cover

was the LVDC hardware and s/w architecture based on any earlier computer ? (maybe Gemini Guidance Computer, also by IBM)
did it have RAM and ROM ? (just r/w core memory ?)
how were programs prepared ? (punch cards?)
how was software loaded into the LVDC ?
how were control signals output ? - Rod57 (talk) 15:07, 1 November 2018 (UTC)[reply]

[6] says it had 18 'discrete' outputs and 25 pulsed outputs (& telemetry downlink)

Saturn Launch Vehicles TR X-881 describes the process input-output instruction on pages 20-79 to 20-84. - Rod57 (talk) 12:01, 2 November 2018 (UTC)[reply]

[7] p25 says there were ultrasonic glass delay lines for serial arithmetic and storage of the instruction counter. - Rod57 (talk) 17:32, 1 November 2018 (UTC)[reply]

It appears the Data adapter (LVDA) did not contain Eight toroid memory assemblies (collectively referred to as Core Memory) like in the LVDC, but rather "glass delay line" memory? --2db (talk) 2db (talk) 22:51, 1 December 2025 (UTC)[reply]

was the circuitry implemented in the 12 layer? boards (MIBs with up to 35 ULDs) or in the back plane they were plugged into ?
was the voting logic (between the 7 modules in each redundant channel) implemented on the MIBs, (dedicated or mixed with the logic ?) - Rod57 (talk) 12:48, 2 November 2018 (UTC)[reply]

Was the LVDA "Enclosure B" ?

[8] p15 says Enclosure A: Timing, Control and Arithmetic, Memory. Enclosure B: power, Interrupt Logic, Input-Output Digital and Analog Circuits. - Rod57 (talk) 15:24, 1 November 2018 (UTC)[reply]

This article should describe LVDA too, as it is specific to LVDC - Most refs cover both. - Rod57 (talk) 12:41, 2 November 2018 (UTC)[reply]

LVDC (Digital Computer): "Enclosure A - Timing, Control and Arithmetic, [and] Memory."

The LVDC passes its digital Navigation and Guidance commands via the Data Adapter to a separate Analog Computer (the FCC, a barrel-like unit) for final Thrust Vector Control (engine wiggling).

LVDA (Data Adapter): I/O and power, "Enclosure B - Power, Interrupt Logic, Input-Output [for] Digital and Analog Circuits."

The hardware interface needed for the digital computer to communicate with the rest of the rocket.
--2db (talk) 22:25, 4 November 2025 (UTC)[reply]

The article lacks context on how exactly the computations/roles were separated between LVDC and AGS

AGS is said to provide "guidance" and LVDC is said to provide "autopilot". The difference has to be postulated clearly in comparison. 93.185.28.160 (talk) 05:54, 7 August 2019 (UTC)[reply]

The AGS does absolutely nothing while the Saturn is active. The LVDC takes care of the Saturn from launch to orbit, *then* the AGS takes over. They are two completely separate systems. MrAureliusR_Talk! 19:50, 28 May 2022 (UTC)[reply]

Cf. Talk:Saturn_V_instrument_unit#Saturn_V_analog_flight_control_computer

Talk:Saturn_V_instrument_unit#Saturn_V_analog_flight_control_computer 2db (talk) 20:18, 4 November 2025 (UTC)[reply]

Saturn V LVDC Vol2 Jan65.pdf

Commons:File:Saturn V LVDC Vol2 Jan65.pdf

Page 39 showing the Launch Vehicle Digital Computer (LVDC)

--2db (talk) 2db (talk) 03:14, 5 November 2025 (UTC)[reply]

Commercial Serial Computers

The IBM Launch Vehicle Digital Computer (LVDC) was a highly specialized, mission-critical computer designed by IBM in the early 1960s for the Saturn V rocket. Its design priorities were reliability and minimal component count (for size/weight), which led to a bit-serial architecture.

Comparing the LVDC to contemporary commercial computers that used serial operation (like the popular IBM 1401) highlights the distinct trade-offs made for spaceflight guidance versus general business data processing.

LVDC vs. Representative Commercial Serial Computer (Early 1960s)
Feature	IBM Launch Vehicle Digital Computer (LVDC)	Commercial Serial Computer (e.g., IBM 1401)	Notes
Computation Speed (Execution)	~12,190 Instructions Per Second (IPS). A basic Add instruction took 82 μs (microseconds).	Slower for simple arithmetic, typically a few thousand IPS. An 8-digit Add on the IBM 1401 took approximately 230 μs.	LVDC was faster for fixed-word arithmetic than many variable-word-length commercial serial machines, but dramatically slower than contemporary commercial parallel mainframes.
Core Memory Size	Up to 32,768 words of magnetic core memory (26 bits per data word).	Typically much smaller, ranging from 1.4K to 16K characters (e.g., 16,000 characters or less) of magnetic core.	The large LVDC memory was required for complex guidance and navigation programs.
Type of Serial Operation	Bit-Serial. All arithmetic operations were performed one bit at a time.	Character-Serial. Data was processed one character (byte) at a time, optimized for business data processing.	LVDC's bit-serial design prioritized reliability and minimal hardware for spaceflight.

Computation Speed

The primary difference lies in the purpose and the resulting serial method used:

The LVDC was designed to be the "slowest possible reliable computer" that could still handle the Saturn V's guidance and navigation loops (which ran every 40 ms).

Both the LVDC and commercial serial machines were significantly slower than the high-end commercial mainframes of the mid-1960s, like the IBM 7090 or the newer IBM System/360 family. These advanced commercial machines used parallel architecture, processing 32 or 36 bits at once, achieving speeds that were often 10 to 100 times faster than the LVDC.

Core Memory Size

The LVDC's maximum capacity of 32,768 words (26 bits each) of magnetic core memory was quite large for a component that needed to fit into the small Saturn V Instrument Unit of the rocket. This large capacity was necessary to store the complex trajectory and guidance programs. Commercial serial systems (like the IBM 1401) often had smaller core memories, as they were commonly tape- or disk-driven systems that processed data in large external batches.

Serial Operation

The choice of a serial operation method for the LVDC was a critical design decision based on unique spaceflight constraints:

LVDC (Bit-Serial): Processing data one bit at a time required minimal components (fewer transistors and logic gates) in the Arithmetic Logic Unit (ALU). This design maximized reliability (fewer parts to fail) and helped keep the computer's size, weight, and power consumption low—essential for a rocket.
Commercial Serial (Character-Serial): Commercial systems like the IBM 1401 were often character-serial, which was efficient for processing alphanumeric data like names, addresses, and dollar amounts (common in business and accounting), where the data length was variable.

2db (talk) 21:48, 27 November 2025 (UTC)[reply]